The invention herein described relates generally to the fabrication of semiconductor devices and more specifically to such devices that use air gaps and/or multi-level air gaps to reduce capacitive coupling between conductors in such devices. Additionally, the invention herein described relates to the fabrication of semiconductor devices which can contain overcoated conductive lines or leads which are at least partially adjacent to one or more air gaps.
As a consequence of the progress made in integrated circuit technology, the spacing between the metal lines on any given plane of an integrated circuit has become less and less, now extending into the submicrometer range. By reducing the spacing between conductive members in the integrated circuit, an increase in capacitive coupling occurs. This increase in capacitive coupling causes greater crosstalk, higher capacitive losses and increased RC time constant.
In order to reduce capacitive coupling, much effort has been directed toward developing low dielectric constant (low-K) materials to replace conventional dielectric materials that are interposed between the metal lines on a given layer and between layers. Many conventional electronic insulators have dielectric constants in the 3.5 to 4.2 range. For example, silicon dioxide has a dielectric constant of 4.2 and polyimides typically have dielectric constants from 2.9 to 3.5. Some advanced polymers have dielectric constants in the 2.5 to 3.0 range. Materials in the 1.8 to 2.5 range are also known, but such materials have had associated therewith severe processing, cost and materials problems.
The lowest possible, or ideal, dielectric constant is 1.0, which is the dielectric constant of a vacuum. Air is almost as good with a dielectric constant of 1.001. With this recognition of the low dielectric constant of air, attempts have been made to fabricate semiconductor devices with air gaps between metal leads to reduce the capacitive coupling between the electrically conducting members. The air gap forming techniques that have been developed have varying degrees of complexity.
U.S. Pat. No. 4,987,101 describes a method and structure for providing an insulating electrical space between two lines on a layer of material or between lines on adjacent superposed layers of material. A base member is formed having a plurality of support members extending upwardly from the base member. A removable material is deposited on the base member and around the support members. A cap member of insulating material is then disposed over said support members and the removable material. Access openings are formed in at least one of the base member or the cap member communicating with the removable material. The removable material is removed through the access openings to thereby define a space between the cap member and the base member and between the support members. During this step a partial vacuum (in which some inert gas may be dispersed) may be created in the space vacated by the removable material. The access openings are then filled in so as to provide a sealed space between the cap member and the base member which has a very low dielectric constant.
U.S. Pat. No. 5,324,683 describes several techniques for forming air gaps or regions in a semiconductor device. The air regions are formed by either selectively removing a sacrificial spacer or by selectively removing a sacrificial layer. The air regions are sealed, enclosed or isolated by either a selective growth process or by a non-conformal deposition technique. The air regions may be formed under any pressure, gas concentration or processing condition.
The techniques disclosed in the aforesaid patents rely on holes or other passageways for effecting removal of the sacrificial material. In U.S. Pat. No. 5,461,003, a sacrificial material is removed through a porous dielectric layer. According to this patent, metal leads are formed on a substrate, after which a disposable solid layer is deposited on the metal leads and substrate. The disposable solid layer is then etched back to expose the tops of the metal leads. Then a porous dielectric layer is deposited over the metal leads and disposable layer. This is followed by removal of the disposable layer which is said to be preferably accomplished by exposing the device to oxygen or oxygen-plasma at a high temperature ( greater than 100xc2x0 C.) to vaporize, or burn off, the disposable layer. The oxygen moves through the porous dielectric layer to reach and react with the disposable layer and thereby convert it to a gas that moves back out of the porous dielectric layer. Upon removal of the disposable layer, air gaps are left to provide a low dielectric constant. Finally, a non-porous dielectric layer is deposited on top of the porous dielectric layer to seal the porous dielectric layer from moisture, provide improved structural support and thermal conductivity, and passivate the porous dielectric layer. This procedure results in an air gap that does not extend the full height of the adjacent metal leads or lines. The ""003 patent discloses a modified method to remedy this and increase the process margin. This modified method involves a further process step wherein an oxide layer is formed on top of the metal leads so that the disposable dielectric layer can extend higher than the metal leads.
It is also noted that the exposure of the device to an oxygen plasma which must diffuse through a porous layer is not only inefficient, it also exposes other elements of the device to a potentially damaging oxygen plasma for an extended period of time. In particular, exposure of oxygen plasma to copper lines can prove deleterious. Copper is becoming an increasingly important metal in semiconductor manufacturing due to its lower resistivity when compared to aluminum.
WO 98/32169 describes a method of forming an air gap or gaps within solid structures and specifically semiconductor structures to reduce capacitive coupling between electrical elements such as metal lines. According to WO 98/32169 a method of forming an air gap in a semiconductor structure comprises the steps of (i) using a norbornene-type polymer as a sacrificial material to occupy a closed interior volume in a semiconductor structure; (ii) causing the sacrificial material to decompose (preferably self-decompose upon thermal treatment) into one or more gaseous decomposition products; and (iii) removing at least one of the one or more gaseous decomposition products by passage through at least one solid layer contiguous to the interior volume. The decomposition of the sacrificial material leaves an air gap at the closed interior volume previously occupied by the norbornene-type polymer.
WO 98/32169 further describes that the solid layer is a dielectric material through which at least one of the one or more gaseous decomposition products can pass by diffusion under conditions not detrimental to the semiconductor structure. Finally, WO 98/32169 also discloses production methods which can utilize a wide range of sacrificial materials instead of only a norbornene-type polymer.
The present invention provides a method of forming an air gap or gaps (or multi level structures having such gaps) within solid structures and specifically semiconductor structures to reduce capacitive coupling between electrical elements such as metal lines. Also disclosed is a method which enables the production of overcoated conductive lines or leads. Such methods overcome one or more of the drawbacks associated with the aforesaid prior attempts to reduce capacitive coupling in semiconductor structures such as integrated circuits and packages.
For example, in some instances it is advantageous to utilize a sacrificial material which is less costly, easier to process or xe2x80x9cworkxe2x80x9d with, and has a lower decomposition temperature. The present invention provides such advantages via methods which enable to formation and/or production of structures having air gaps produced utilizing polycarbonates and/or polymethyl methacrylates.
According to one aspect of the invention, a method of forming an air gap within a semiconductor structure comprises the steps of: (i) using a sacrificial material to occupy a closed interior volume in a semiconductor structure; (ii) causing the sacrificial material to decompose into one or more gaseous decomposition products; and (iii) removing at least one of the one or more gaseous decomposition products by passage through at least one solid layer contiguous to the interior volume, wherein the decomposition of the sacrificial material leaves an air gap at the closed interior volume previously occupied thereby, and the sacrificial material comprises a polymer composition selected from one or more polycarbonate polymers, polyester polymers, polyether polymers, methacrylate polymers, acrylate polymers, or mixtures thereof.
In accordance with another aspect of the invention, a method of forming one or more air gaps in a semiconductor structure comprises the steps of: (I) forming a patterned layer of sacrificial material on a substrate corresponding to a pattern of one or more gaps to be formed in the semiconductor structure; (II) depositing a second material on the substrate within regions bordered by the sacrificial material; (III) forming an overcoat layer of material overlying the patterned layer of sacrificial material and second material in the regions bordered by the sacrificial material; (IV) causing the sacrificial material to decompose into one or more gaseous decomposition products; and (V) removing at least one of the one or more gaseous decomposition products by passage through the overcoat layer so that one or more air gaps are formed within the semiconductor structure, wherein the sacrificial material is a polymer composition selected from one or more polycarbonate polymers, polyester polymers, polyether polymers, methacrylate polymers, acrylate polymers, or mixtures thereof.
In accordance with another aspect of the invention, a method of forming air gaps within a semiconductor structure comprises the steps of: using at least one sacrificial material to occupy simultaneously or sequentially at least two closed interior volumes in a semiconductor structure, wherein the at least two closed interior volumes are on different levels of the semiconductor structure; causing the at least one sacrificial material occupying the at least two closed interior volumes to decompose either simultaneously or sequentially into one or more gaseous decomposition products; and removing at least one of the one or more gaseous decomposition products by passage through at least one solid layer contiguous to the interior volume.
In accordance with another aspect of the invention, a method of forming one or more air gaps in a semiconductor structure comprises the steps of: (A) forming a patterned layer of a first sacrificial material on one side of a substrate corresponding to a pattern of one or more gaps to be formed in the semiconductor structure; (B) depositing a second material on the substrate within regions bordered by the first sacrificial material; (C) forming a first overcoat layer of material overlying the patterned layer of the first sacrificial material and the second material in the regions bordered by the first sacrificial material; (D) causing the first sacrificial material to decompose into one or more gaseous decomposition products; (E) removing at least one of the one or more gaseous decomposition products by passage through the first overcoat layer so that one or more air gaps are formed within the semiconductor structure; (F) forming a patterned layer of a second sacrificial material on the first overcoat layer corresponding to a pattern of one or more gaps to be formed in the semiconductor structure; (G) depositing a third material on the first overcoat layer substrate within regions bordered by the second sacrificial material; (H) forming a second overcoat layer of material overlying the patterned layer of the second sacrificial material and the third material in the regions bordered by the second sacrificial material; (I) causing the second sacrificial material to decompose into one or more gaseous decomposition products; and (J) removing at least one of the one or more gaseous decomposition products by passage through the overcoat layers so that one or more air gaps are formed within the semiconductor structure, wherein the first and second sacrificial materials are independently selected from one or more polycarbonate polymers, polyester polymers, polyether polymers, methacrylate polymers, acrylate polymers, or mixtures thereof.
In accordance with another aspect of the invention, a method of forming one or more air gaps in a semiconductor structure comprises the steps of: (A) forming a patterned layer of a first sacrificial material on one side of a substrate corresponding to a pattern of one or more gaps to be formed in the semiconductor structure; (B) depositing a second material on the substrate within regions bordered by the first sacrificial material; (C-1) forming a first overcoat layer of material overlying the patterned layer of the first sacrificial material and the second material in the regions bordered by the first sacrificial material; (C-2) forming a patterned layer of a second sacrificial material on the first overcoat layer corresponding to a pattern of one or more gaps to be formed in the semiconductor structure; (C-3) depositing a third material on the first overcoat layer within regions bordered by the second sacrificial material; (C-4) forming a second overcoat layer of material overlying the patterned layer of the second sacrificial material and the third material in the regions bordered by the second sacrificial material; (Dxe2x80x2) causing the first and second sacrificial materials to decompose into one or more gaseous decomposition products; and (Exe2x80x2) removing at least one of the one or more gaseous decomposition products by passage through the overcoat layers so that one or more air gaps are formed within the semiconductor structure, wherein the first and second sacrificial materials are independently selected from one or more norbornene polymers, polycarbonate polymers, polyester polymers, polyether polymers, methacrylate polymers, acrylate polymers, or mixtures thereof.
In accordance with another aspect of the invention, a method of forming one or more air gaps in a semiconductor structure comprises the steps of: using a sacrificial material to occupy at least one first closed interior volume in a semiconductor structure and using a conductive material to occupy at least one second closed interior volume in a semiconductor structure, the at least one first closed interior volume and the at least one second closed interior volume defining at least one gap therebetween; forming an overcoat layer of material on the sacrificial material and the conductive material with the overcoat material extending into the at least one gap; causing the sacrificial material to decompose into one or more gaseous decomposition products; and removing at least one of the one or more gaseous decomposition products by passage through the first overcoat layer so that one or more air gaps are formed within the semiconductor structure, thereby yielding overcoated conductive structures.
According to yet another aspect of the invention, a semiconductor device having at least one air gap therein comprises: a substrate; at least one conductive line or lead; at least one air gap; and an overcoat layer, wherein the at least one air gap is produced in accordance with any one of the methods disclosed herein.
According to yet another aspect of the invention, a semiconductor structure comprises: a substrate; a sacrificial material supported on the substrate; a conductive material supported on the substrate and spaced apart from the sacrificial material; an overcoat layer overcoating the sacrificial material and the conductive material and extending into the one or more spaces between the sacrificial material and the conductive material.
According to yet another aspect of the invention, a semiconductor structure comprises: a substrate; a sacrificial material supported on the substrate; a conductive material supported on the substrate and spaced apart from the sacrificial material; an overcoat layer overcoating the sacrificial material and the conductive material and extending into the one or more spaces between the sacrificial material and the conductive material, wherein the sacrificial material has been removed by decomposition through the overcoat layer.
To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative embodiments of the invention. These embodiments are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.